cbuffer cb2 : register(b2)
{
  float4 cb2[19];
}

cbuffer cb1 : register(b1)
{
  float4 cb1[45];
}

cbuffer cb0 : register(b0)
{
  float4 cb0[12];
}


Texture2D<float4> StereoParams : register(t125);
Texture1D<float4> IniParams : register(t120);

void main( 
  float4 v0 : POSITION0,
  float4 v1 : TANGENT0,
  float3 v2 : NORMAL0,
  float4 v3 : TEXCOORD0,
  float4 v4 : TEXCOORD1,
  float4 v5 : TEXCOORD2,
  float4 v6 : TEXCOORD3,
  float4 v7 : COLOR0,
  out float4 o0 : SV_POSITION0,
  out float4 o1 : TEXCOORD0,
  out float4 o2 : TEXCOORD1,
  out float4 o3 : TEXCOORD2,
  out float4 o4 : TEXCOORD3,
  out float4 o5 : TEXCOORD5,
  out float3 o6 : TEXCOORD6)
{
  float4 r0,r1,r2,r3;
  uint4 bitmask, uiDest;
  float4 fDest;

  r0.xyzw = cb2[1].xyzw * v0.yyyy;
  r0.xyzw = cb2[0].xyzw * v0.xxxx + r0.xyzw;
  r0.xyzw = cb2[2].xyzw * v0.zzzz + r0.xyzw;
  o0.xyzw = cb2[3].xyzw * v0.wwww + r0.xyzw;
  o1.xy = v3.xy * cb0[10].xy + cb0[10].zw;
  o1.zw = v3.xy * cb0[11].xy + cb0[11].zw;
  r0.xyz = cb2[13].xyz * v0.yyy;
  r0.xyz = cb2[12].xyz * v0.xxx + r0.xyz;
  r0.xyz = cb2[14].xyz * v0.zzz + r0.xyz;
  r0.xyz = cb2[15].xyz * v0.www + r0.xyz;
  o2.w = r0.x;
  r1.xyz = cb2[13].yzx * v1.yyy;
  r1.xyz = cb2[12].yzx * v1.xxx + r1.xyz;
  r1.xyz = cb2[14].yzx * v1.zzz + r1.xyz;
  r0.x = dot(r1.xyz, r1.xyz);
  r0.x = rsqrt(r0.x);
  r1.xyz = r1.xyz * r0.xxx;
  r2.x = cb2[16].x * v2.x;
  r2.y = cb2[17].x * v2.x;
  r2.z = cb2[18].x * v2.x;
  r3.x = cb2[16].y * v2.y;
  r3.y = cb2[17].y * v2.y;
  r3.z = cb2[18].y * v2.y;
  r2.xyz = r3.xyz + r2.xyz;
  r3.x = cb2[16].z * v2.z;
  r3.y = cb2[17].z * v2.z;
  r3.z = cb2[18].z * v2.z;
  r2.xyz = r3.xyz + r2.xyz;
  r0.x = dot(r2.xyz, r2.xyz);
  r0.x = rsqrt(r0.x);
  r2.xyz = r2.xyz * r0.xxx;
  r3.xyz = r2.zxy * r1.xyz;
  r3.xyz = r2.yzx * r1.yzx + -r3.xyz;
  r3.xyz = v1.www * r3.xyz;
  o2.y = r3.x;
  o2.x = r1.z;
  o2.z = r2.x;
  o3.x = r1.x;
  o4.x = r1.y;
  o3.w = r0.y;
  o4.w = r0.z;
  o3.z = r2.y;
  o3.y = r3.y;
  o4.y = r3.z;
  o4.z = r2.z;
  o5.xyzw = float4(0,0,0,0);
  r0.x = r2.y * r2.y;
  r0.x = r2.x * r2.x + -r0.x;
  r1.xyzw = r2.xyzz * r2.yzzx;
  r3.x = dot(cb1[41].xyzw, r1.xyzw);
  r3.y = dot(cb1[42].xyzw, r1.xyzw);
  r3.z = dot(cb1[43].xyzw, r1.xyzw);
  r0.xyz = cb1[44].xyz * r0.xxx + r3.xyz;
  r2.w = 1;
  r1.x = dot(cb1[38].xyzw, r2.xyzw);
  r1.y = dot(cb1[39].xyzw, r2.xyzw);
  r1.z = dot(cb1[40].xyzw, r2.xyzw);
  o6.xyz = r1.xyz + r0.xyz;
  return;
}

/*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Original ASM ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION                 0   xyzw        0     NONE   float   xyzw
// TANGENT                  0   xyzw        1     NONE   float   xyzw
// NORMAL                   0   xyz         2     NONE   float   xyz 
// TEXCOORD                 0   xyzw        3     NONE   float   xy  
// TEXCOORD                 1   xyzw        4     NONE   float       
// TEXCOORD                 2   xyzw        5     NONE   float       
// TEXCOORD                 3   xyzw        6     NONE   float       
// COLOR                    0   xyzw        7     NONE   float       
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION              0   xyzw        0      POS   float   xyzw
// TEXCOORD                 0   xyzw        1     NONE   float   xyzw
// TEXCOORD                 1   xyzw        2     NONE   float   xyzw
// TEXCOORD                 2   xyzw        3     NONE   float   xyzw
// TEXCOORD                 3   xyzw        4     NONE   float   xyzw
// TEXCOORD                 5   xyzw        5     NONE   float   xyzw
// TEXCOORD                 6   xyz         6     NONE   float   xyz 
//
vs_4_0
dcl_constantbuffer cb0[12], immediateIndexed
dcl_constantbuffer cb1[45], immediateIndexed
dcl_constantbuffer cb2[19], immediateIndexed
dcl_input v0.xyzw
dcl_input v1.xyzw
dcl_input v2.xyz
dcl_input v3.xy
dcl_output_siv o0.xyzw, position
dcl_output o1.xyzw
dcl_output o2.xyzw
dcl_output o3.xyzw
dcl_output o4.xyzw
dcl_output o5.xyzw
dcl_output o6.xyz
dcl_temps 4
mul r0.xyzw, v0.yyyy, cb2[1].xyzw
mad r0.xyzw, cb2[0].xyzw, v0.xxxx, r0.xyzw
mad r0.xyzw, cb2[2].xyzw, v0.zzzz, r0.xyzw
mad o0.xyzw, cb2[3].xyzw, v0.wwww, r0.xyzw
mad o1.xy, v3.xyxx, cb0[10].xyxx, cb0[10].zwzz
mad o1.zw, v3.xxxy, cb0[11].xxxy, cb0[11].zzzw
mul r0.xyz, v0.yyyy, cb2[13].xyzx
mad r0.xyz, cb2[12].xyzx, v0.xxxx, r0.xyzx
mad r0.xyz, cb2[14].xyzx, v0.zzzz, r0.xyzx
mad r0.xyz, cb2[15].xyzx, v0.wwww, r0.xyzx
mov o2.w, r0.x
mul r1.xyz, v1.yyyy, cb2[13].yzxy
mad r1.xyz, cb2[12].yzxy, v1.xxxx, r1.xyzx
mad r1.xyz, cb2[14].yzxy, v1.zzzz, r1.xyzx
dp3 r0.x, r1.xyzx, r1.xyzx
rsq r0.x, r0.x
mul r1.xyz, r0.xxxx, r1.xyzx
mul r2.x, v2.x, cb2[16].x
mul r2.y, v2.x, cb2[17].x
mul r2.z, v2.x, cb2[18].x
mul r3.x, v2.y, cb2[16].y
mul r3.y, v2.y, cb2[17].y
mul r3.z, v2.y, cb2[18].y
add r2.xyz, r2.xyzx, r3.xyzx
mul r3.x, v2.z, cb2[16].z
mul r3.y, v2.z, cb2[17].z
mul r3.z, v2.z, cb2[18].z
add r2.xyz, r2.xyzx, r3.xyzx
dp3 r0.x, r2.xyzx, r2.xyzx
rsq r0.x, r0.x
mul r2.xyz, r0.xxxx, r2.xyzx
mul r3.xyz, r1.xyzx, r2.zxyz
mad r3.xyz, r2.yzxy, r1.yzxy, -r3.xyzx
mul r3.xyz, r3.xyzx, v1.wwww
mov o2.y, r3.x
mov o2.x, r1.z
mov o2.z, r2.x
mov o3.x, r1.x
mov o4.x, r1.y
mov o3.w, r0.y
mov o4.w, r0.z
mov o3.z, r2.y
mov o3.y, r3.y
mov o4.y, r3.z
mov o4.z, r2.z
mov o5.xyzw, l(0,0,0,0)
mul r0.x, r2.y, r2.y
mad r0.x, r2.x, r2.x, -r0.x
mul r1.xyzw, r2.yzzx, r2.xyzz
dp4 r3.x, cb1[41].xyzw, r1.xyzw
dp4 r3.y, cb1[42].xyzw, r1.xyzw
dp4 r3.z, cb1[43].xyzw, r1.xyzw
mad r0.xyz, cb1[44].xyzx, r0.xxxx, r3.xyzx
mov r2.w, l(1.000000)
dp4 r1.x, cb1[38].xyzw, r2.xyzw
dp4 r1.y, cb1[39].xyzw, r2.xyzw
dp4 r1.z, cb1[40].xyzw, r2.xyzw
add o6.xyz, r0.xyzx, r1.xyzx
ret 
// Approximately 0 instruction slots used

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/


/*~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Recompiled ASM ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
//
// Generated by Microsoft (R) HLSL Shader Compiler 9.30.9200.20789
//
//   using 3Dmigoto v1.2.1 on Mon Sep 14 08:41:15 2015
//
//
// Buffer Definitions: 
//
// cbuffer cb2
// {
//
//   float4 cb2[19];                    // Offset:    0 Size:   304
//
// }
//
// cbuffer cb1
// {
//
//   float4 cb1[45];                    // Offset:    0 Size:   720
//
// }
//
// cbuffer cb0
// {
//
//   float4 cb0[12];                    // Offset:    0 Size:   192
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// cb0                               cbuffer      NA          NA    0        1
// cb1                               cbuffer      NA          NA    1        1
// cb2                               cbuffer      NA          NA    2        1
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION                 0   xyzw        0     NONE   float   xyzw
// TANGENT                  0   xyzw        1     NONE   float   xyzw
// NORMAL                   0   xyz         2     NONE   float   xyz 
// TEXCOORD                 0   xyzw        3     NONE   float   xy  
// TEXCOORD                 1   xyzw        4     NONE   float       
// TEXCOORD                 2   xyzw        5     NONE   float       
// TEXCOORD                 3   xyzw        6     NONE   float       
// COLOR                    0   xyzw        7     NONE   float       
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION              0   xyzw        0      POS   float   xyzw
// TEXCOORD                 0   xyzw        1     NONE   float   xyzw
// TEXCOORD                 1   xyzw        2     NONE   float   xyzw
// TEXCOORD                 2   xyzw        3     NONE   float   xyzw
// TEXCOORD                 3   xyzw        4     NONE   float   xyzw
// TEXCOORD                 5   xyzw        5     NONE   float   xyzw
// TEXCOORD                 6   xyz         6     NONE   float   xyz 
//
vs_4_0
dcl_constantbuffer cb2[19], immediateIndexed
dcl_constantbuffer cb1[45], immediateIndexed
dcl_constantbuffer cb0[12], immediateIndexed
dcl_input v0.xyzw
dcl_input v1.xyzw
dcl_input v2.xyz
dcl_input v3.xy
dcl_output_siv o0.xyzw, position
dcl_output o1.xyzw
dcl_output o2.xyzw
dcl_output o3.xyzw
dcl_output o4.xyzw
dcl_output o5.xyzw
dcl_output o6.xyz
dcl_temps 5
mul r0.xyzw, v0.yyyy, cb2[1].xyzw
mad r0.xyzw, cb2[0].xyzw, v0.xxxx, r0.xyzw
mad r0.xyzw, cb2[2].xyzw, v0.zzzz, r0.xyzw
mad o0.xyzw, cb2[3].xyzw, v0.wwww, r0.xyzw
mad o1.xy, v3.xyxx, cb0[10].xyxx, cb0[10].zwzz
mad o1.zw, v3.xxxy, cb0[11].xxxy, cb0[11].zzzw
mul r0.xyz, v0.yyyy, cb2[13].xyzx
mad r0.xyz, cb2[12].xyzx, v0.xxxx, r0.xyzx
mad r0.xyz, cb2[14].xyzx, v0.zzzz, r0.xyzx
mad r0.xyz, cb2[15].xyzx, v0.wwww, r0.xyzx
mov o2.w, r0.x
mul r1.xyz, v2.zxyz, cb2[16].zxyz
mov r2.x, r1.z
mul r3.xyz, v2.yxzy, cb2[17].yxzy
mov r2.y, r3.x
mul r4.xyz, v2.xyzx, cb2[18].xyzx
mov r2.z, r4.y
mov r3.x, r1.y
mov r1.y, r3.z
mov r3.z, r4.x
mov r1.z, r4.z
add r2.xyz, r2.xyzx, r3.xyzx
add r1.xyz, r1.xyzx, r2.xyzx
dp3 r0.x, r1.xyzx, r1.xyzx
rsq r0.x, r0.x
mul r1.xyz, r0.xxxx, r1.xyzx
mul r2.xyz, v1.yyyy, cb2[13].zxyz
mad r2.xyz, cb2[12].zxyz, v1.xxxx, r2.xyzx
mad r2.xyz, cb2[14].zxyz, v1.zzzz, r2.xyzx
dp3 r0.x, r2.xyzx, r2.xyzx
rsq r0.x, r0.x
mul r2.xyz, r0.xxxx, r2.xyzx
mul r3.xyz, r1.zxyz, r2.zxyz
mad r3.xyz, r1.yzxy, r2.xyzx, -r3.xyzx
mul r3.xyz, r3.xyzx, v1.wwww
mov o2.y, r3.x
mov o2.z, r1.x
mov o2.x, r2.y
mov o3.x, r2.z
mov o4.x, r2.x
mov o3.w, r0.y
mov o4.w, r0.z
mov o3.z, r1.y
mov o3.y, r3.y
mov o4.y, r3.z
mov o4.z, r1.z
mov o5.xyzw, l(0,0,0,0)
mul r0.x, r1.y, r1.y
mad r0.x, r1.x, r1.x, -r0.x
mul r2.xyzw, r1.yzzx, r1.xyzz
dp4 r3.x, cb1[41].xyzw, r2.xyzw
dp4 r3.y, cb1[42].xyzw, r2.xyzw
dp4 r3.z, cb1[43].xyzw, r2.xyzw
mad r0.xyz, cb1[44].xyzx, r0.xxxx, r3.xyzx
mov r1.w, l(1.000000)
dp4 r2.x, cb1[38].xyzw, r1.xyzw
dp4 r2.y, cb1[39].xyzw, r1.xyzw
dp4 r2.z, cb1[40].xyzw, r1.xyzw
add o6.xyz, r0.xyzx, r2.xyzx
ret 
// Approximately 60 instruction slots used

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/
